Workshop
Major Publications
FY2009
Journal Papers
Invited Talk
 Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Kazuaki Murakami (Kyushu Univ.): "Optimizing the Architectures of SFQRDP (Single Flux Quantum Reconfigurable Datapath)," Superconducting SFQ VLSI Workshop 2009 (SSV2009), I2, Kyushu University School of Medicine, Fukuoka, Japan, June. 15, 2009.
 Akira Fujimaki, Ryo Kasagi, Katsumi Takagi, Irina Kataeva, Hiroyuki Akaike, Masamitsu
Tanaka, Naofumi Takagi (Nagoya Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Kazuaki Murakami (Kyushu Univ.): "Demonstration of 2x3 Reconfigurabledatapath Processors with 14000
Josephson Junctions," International Superconductive Electronics Conference 2009 (ISEC'09), SPO4, Fukuoka. Japan, June 17, 2009.
International Conference/Workshop
 Kazuyoshi Takagi, Yuki Ito, Masamitsu Tanaka and Naofumi Takagi (Nagoya Univ.): "A Method for LayoutDriven Skewed Clock Tree Synthesis for SFQ Circuits," Superconducting SFQ VLSI Workshop 2009 (SSV2009), O1, Kyushu University School of Medicine, Fukuoka, Japan, June. 15, 2009.
 Masamitsu Tanaka, Kazuyoshi Takagi, Naofumi Takagi (Nagoya Univ.), Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.): "HighThroughput Arithmetic Circuits based on Systolic Architecture for SFQ Reconfigurable DataPath," Superconducting SFQ VLSI Workshop 2009 (SSV2009), O4, Kyushu University School of Medicine, Fukuoka, Japan, June. 15, 2009.
 Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Naofumi Takagi (Nagoya Univ.): "A Crossbar Switch for Routing of 2bit Wide Data Streams," Superconducting SFQ VLSI Workshop 2009 (SSV2009), O5, Kyushu University School of Medicine, Fukuoka, Japan, June. 15, 2009.
 Y. Yamanashi, T. Kainuma, M. Igarashi, H. Hara, K. Taketomi, H. Park, H. Suzuki, Y.Natsume, N. Yoshikawa, H. Akaike, M. Tanaka, K. Takagi, I. Kataeva, R. Kasagi, M. Itoh, A.Fujimaki, S. Nagasawa, M. Hidaka: "100 GHz Demonstrations Based on the SingleFluxQuantum Cell Library for the 10 kA/cm2 Nb MultiLayer Process," International Superconductive Electronics Conference 2009 (ISEC'09), SPO6, Fukuoka. Japan, June 17, 2009.
 Naofumi Takagi, Masamitsu Tanaka, Kazuyoshi Takagi: "Hardware Algorithms for SFQ Arithmetic Circuits," International Superconductive Electronics Conference 2009 (ISEC'09), STO3, Fukuoka. Japan, June 18, 2009.
 Yuki Nagai, Ryohei Kanada, Hiroyuki Akaike, Akira Fujimaki: "Preparation Process of PlasmaNitrided Barriers in NbN Josephson Junctions
for Digital Applications," International Superconductive Electronics Conference 2009 (ISEC'09), TDO6, Fukuoka. Japan, June 19, 2009.
FY2008
Journal Papers
 F. Mehdipour, H. Noori, H. Honda, K. Inoue, and K. J. Murakami, "A gravitydirected temporal partitioning approach," IEICE Electronics Express, vol. 5, no. 10, pp. 366373, May 2008.
 K. Nakamiya, N. Yoshikawa, A. Fujimaki, H. Terai, Y. Hashimoto, "Direct measurements of propagation delay of singlefluxquantum circuits by timetodigital converters," IEICE Electronics Express, vol. 5, no. 9, pp.332337, May 2008.
 H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, A. Fujimaki, N. Takagi, "Novel serialparallel converter using SFQ logic circuits," Physica C, vol. 468, pp. 19771982, Sep. 2008.
 M. Tanaka, K. Obata, K. Takagi, N. Takagi, A. Fujimaki, N. Yoshikawa, "A highthroughput singlefluxquantum floatingpoint serial divider using the signeddigit representation," IEEE Trans. Appl. Supercond., accepted.
 I. Kataeva, H. Akaike, A. Fujimaki, N. Yoshikawa, N. Takagi, K. Inoue, H. Honda, K. Murakami, "An Operand Routing Network for an SFQ Reconfigurable DataPaths Processor," IEEE Trans. Appl. Supercond., accepted.
 K. Takagi, M. Tanaka, S. Iwasaki, R. Kasagi, S. Nagasawa, T. Satoh, H. Akaike, A. Fujimaki, "SFQ Propagation Properties in Passive Transmission Lines Based on a 10NbLayers Structure," IEEE Trans. Appl. Supercond., accepted.
 H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, M. Tanaka, K. Obata, Y. Itou, A. Fujimaki, N. Takagi, K. Takagi, S. Nagasawa, "Design and implementation of SFQ halfprecision floatingpoint adders," IEEE Trans. Appl. Supercond., accepted.
 T. Satoh, K. Hinode, S. Nagasawa, Y. Kitagawa, M. Hidaka, N. Yoshikawa, H. Akaike, A. Fujimaki, K. Takagi, N. Takagi, " Planarization Process for Fabricating Multilayer Nb Integrated Circuits Incorporating Top Active Layer," IEEE Trans. Appl. Supercond., accepted.
 K. Fujiwara, S. Nagasawa, Y. Hashimoto, M. Hidaka, N. Yoshikawa, M. Tanaka, H. Akaike, A. Fujimaki, K. Takagi, and N. Takagi, "Research on Effective Moat Configuration for Nb MultiLayer Device Structure," IEEE Trans. Appl. Supercond., accepted.
 H. Akaike, M. Tanaka, K. Takagi, I. Kataeva, R. Kasagi, A. Fujimaki, K. Takagi, M. Igarashi, H. Park, Y. Yamanashi, N. Yoshikawa, K. Fujiwara, S. Nagasawa, M. Hidaka, and N. Takagi, "Design of Single Flux Quantum cells for a 10Nblayer process," Physica C., accepted.
 M. Tanaka, H. Akaike, A. Fujimaki, "Control of return currents in the singlefluxquantum circuits using positive/negative bias supply lines," Physica C., accepted.
 .S. Nagasawa, T. Satoh, K. Hinode, Y. Kitagawa, M. Hidaka, H. Akaike, A. Fujimaki, K. Takagi, N. Takagi, N. Yoshikawa, "New Nb multilayer Fabrication Process for LargeScale SFQ Circuits," Physica C, accepted.
 H. Hara, H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, K. Obata, M. Tanaka, N. Takagi, K. Takagi, A. Fujimaki, S. Nagasawa, "Design and Implementation of SFQ HalfPrecision FloatingPoint Multipliers," IEEE Trans. Appl. Supercond., accepted.
 H. Akaike, K. Shigehara, A. Fujimaki, T. Satoh, K. Hinode, S. Nagasawa, M. Hidaka, "The Effects of a DC Power Layer in a 10NbLayer Device for SFQ LSIs," IEEE Trans. Appl. Supercond., accepted.
Invited Talk
 N. Yoshikawa, "RSFQ projects in Japan," 5th FLUXONICS RSFQ design workshop, Ilmenau , Jun 2008.
 A. Fujimaki, S. Iwasaki, K. Takagi, R. Kasagi, I. Kataeva, H. Akaike, M. Tanaka, N. Takagi, N. Yoshikawa, K. Murakami, "Demonstration of an SFQBased Accelerator Prototype for a HighPerformance Computer," 2008 Applied Superconductivity Conference (ASC 2008), 2EZ01, Chicago, Aug 2008.
 H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, M. Tanaka, K. Obata, Y. Itou, A. Fujimaki, N. Takagi, K. Takagi, S. Nagasawa, "Design and Implementation of SFQ HalfPrecision FloatingPoint Adders," 2008 Applied Superconductivity Conference (ASC 2008), 4EB01, Chicago, August 2008.
 F. Mehdipour, H. Noori, H. Honda, K. Inoue, and K. J. Murakami, "Performance Evaluation of a Reconfigurable Instruction Set Processor," International SoC Design Conference (ISOCC 2008), Busan, Nov 2008.
 S. Nagasawa, T. Satoh, K. Hinode, Y. Kitagawa, M. Hidaka, H. Akaike, A. Fujimaki, K. Takagi, N. Takagi, N. Yoshikawa, "New Nb multilayer Fabrication Process for LargeScale SFQ Circuits," International Symposium on Superconductivity 2008 (ISS 2008), FD22INV, Tsukuba, Oct 2008.
 N. Yoshikawa, H. Park, H. Hara, K. Taketomi, Y. Yamanashi, I. Kataeva, R. Kasagi, S.Iwasaki, H. Akaike, A. Fujimaki, M. Tanaka, K. Obata, Y. Ito, K. Takagi, N. Takagi, H. Honda, K. Inoue, K. Murakami, S. Nagasawa, M. Hidaka, "Recent development of LargeScale reconfigurable datapaths using RSFQ Circuits," 21th International Symposium on Superconductivity (ISS2008), FD25INV, Tsukuba, Oct 2008.
International Conference/Workshop
 M. Tanaka, K. Obata, K. Takagi, N. Takagi, A. Fujimaki, N. Yoshikawa, "A highthroughput singlefluxquantum floatingpoint serial divider using the signeddigit representation," 2008 Applied Superconductivity Conference (ASC 2008), 2EZ02, Chicago, August 2008.
 H. Hara, H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, K. Obata, M. Tanaka, N. Takagi, K. Takagi, A. Fujimaki, S. Nagasawa, "Design and Implementation of SFQ HalfPrecision FloatingPoint Multipliers," 2008 Applied Superconductivity Conference (ASC 2008), 2EZ03, Chicago, August 2008.
 I. Kataeva, H. Akaike, A. Fujimaki, N. Takagi, N. Yoshikawa, K. Inoue, H. Honda, K. Murakami, "An Operand Routing Network for an SFQ Reconfigurable DataPaths Processor," 2008 Applied Superconductivity Conference (ASC 2008), 2EZ07, Chicago, August 2008.
 M. Tanaka, H. Akaike, A. Fujimaki, "Control of return currents in the singlefluxquantum circuits using positive/negative bias supply lines," 21th International Symposium on Superconductivity (ISS2008), FD26, Tsukuba, Oct 2008.
 F. Mehdipour, H. Noori, B. Javadi, H. Honda, K. Inoue, and K. Murakami, "A combined analytical and simulationbased model for performance evaluation of a reconfigurable instruction set processor," The 14th Asia and SouthPacific Design Automation Conference (ASPDAC 2009), pp.564569, Jan. 2009.
FY2007
Journal Papers
 F. Mehdipour, H. Noori, M. S. Zamani, K. Inoue, and K. Murakami: "Improving Performance and Energy Saving in a Reconfigurable Processor via Accelerating Control Data Flow Graphs," IEICE Transactions on Information and Systems, vol. E90D, no.12, pp.19561966, Dec. 2007.
 S. Iwasaki, M. Tanaka, Y. Yamanashi, H. Park, H. Akaike, A. Fujimaki, N. Yoshikawa, N. Takagi, K. Murakami, H. Honda and K. Inoue: "Design of a reconfigurable datapath prototype in the singlefluxquantum circuit," Superconductor Science and Technology, vol. 20, no. 11, pp. S328S331, Nov. 2007.
 H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, A. Fujimaki, and N. Takagi, " Novel SerialParallel Converter Using SFQ Logic Circuits," Physica C (to be published).
 H. Akaike, A. Fujimaki, S. Nagasawa, Y. Kitagawa, and M. Hidaka, "Effects of the film thickness of a ground plane in the SFQ circuits with a dcpower layer," Superconductor Science and Technology, vol. 20, no. 11, pp. S336S340, Nov. 2007.
Invited Talk
 M. Hidaka, S. Nagasawa, K. Hinode and T. Satoh (ISTEC)： "Advanced fabrication process for Nb single flux quantum circuits," 11th International Superconductive Electronics Conference (ISEC'07), II01, Washington, D.C. USA, June 12, 2007.
 A. Fujimaki (Nagoya Univ.): "Recent Progress in SFQ LSI Technology," 8th European Conference on Applied Superconductivity (EUCAS’07), Brussels, Belgium, Sept. 2007.
 A. Fujimaki (Nagoya Univ.): "Superconducting Electronics in Japan," US Workshop on Superconducting Electronics, Lakeville, CT USA., Oct. 2007
 F. Mehdipour, H. Noori, K. Inoue, and K. Murakami (Kyushu Univ.): "High Performance, Low Power Reconfigurable Processor for Embedded Systems," International SoC Design Conference (ISOCC'07), pp.5155, Oct. 2007.
 N. Takagi, K. Murakami, A. Fujimaki, N. Yoshikawa, K. Inoue, and H. Honda (Nagoya Univ., Kyushu Univ., Yokohama National Univ.): "A DeskSide Supercomputer with RSFQ Reconfigurable DataPaths," 日本学術振興会 超伝導エレクトロニクス第146委員会 創立25周年記念シンポジウム，タワーホール船堀（東京），2007年10月18日
 N. Yoshikawa (Yokohama National Univ.): "Superconductor Electronics based on Single FluxQuantum Circuit Technology," East Asia Symposium on Superconductor Electronics, 1115 Dec. 2007, Delhi, India.
 I. Kataeva, S. Iwasaki, H. Akaike, A. Fujimaki, N. Yoshikawa, N. Takagi and K. Murakami (Nagoya Univ., Yokohama National Univ., Kyushu Univ.): "Demonstration of the key components of an SFQ Reconfigurable DataPaths Processor: an Operand Routing Network and a 2×2 RDP prototype," Superconducting SFQ VLSI Workshop 2008 (SSV2008), I2, Yokohama National University, Yokohama, Japan, Mar. 17, 2008.
 M. Tanaka, K. Obata, Y. Yamanashi, H. Park, S. Iwasaki, K. Taketomi, K. Takagi, K. Takagi, N. Takagi, A. Fujimaki, and N. Yoshikawa (Nagoya Univ., Yokohama National Univ.): "CORE1: Review and Recent Developments in Bitserial SFQ Microprocessors," Superconducting SFQ VLSI Workshop 2008 (SSV2008), I3, Yokohama National University, Yokohama, Japan, Mar. 17, 2008.
International Conference/Workshop
 H. Akaike, A. Fujimaki, S. Nagasawa, Y. Kitagawa, and M. Hidaka（Nagoya Univ., ISTEC）: "Effects of the film thickness of a ground plane in the SFQ circuits with a dcpower layer," 11th International Superconductive Electronics Conference (ISEC'07), OA04, Washington, D.C. USA, June 11, 2007.
 H. Hara, Y. Nobumori, N. Yoshikawa, A. Fujimaki, Y. Hashimoto, and H. Terai (Yokohama National Univ.): "Asynchronous HighSpeed Operation of RSFQ FirstIn FirstOut Buffers," 11th International Superconductivity Conference (ISEC'07), OS03, Washington, D.C. USA, June 13, 2007.
 H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, A. Fujimaki, and N. Takagi (Yokohama National Univ., Nagoya Univ.): "Fast BitSerial Multipliers Using RSFQ Logic Circuits," 11th International Superconductivity Electronics Conference (ISEC'07), OS04, Washington, D.C. USA, June 13, 2007.
 F. Mehdipour, H. Noori, M. S. Zamani, K. Inoue, and K. Murakami (Kyushu Univ.): "Design Space Exploration for a Coarse Grain Accelerator," 13th Asia and South Pacific Design Automation Conference (ASPDAC'08), 8B3, pp.685690, COEX, Seoul, Korea, Jan. 24, 2008.
 S. Nagasawa, T. Satoh, K. Hinode, Y. Kitagawa, M. Hidaka, H. Akaike, A. Fujimaki, K. Takagi, N. Takagi, and N. Yoshikawa (ISTEC, Nagoya Univ., Yokohama National Univ.): "New Nb Multilayer Fabrication Process for Superconducting SFQ VLSI Circuits," Superconducting SFQ VLSI Workshop 2008 (SSV2008), A11, Yokohama National University, Yokohama, Japan, Mar. 17, 2008.
 K. Takagi, N. Takagi, M. Tanaka, K. Obata, and Y. Ito (Nagoya Univ.): "ComputerAided Design of Superconducting SFQ Digital Circuits," Superconducting SFQ VLSI Workshop 2008 (SSV2008), A23, Yokohama National University, Yokohama, Japan, Mar. 17, 2008. Slides
 H. Park, Y. Yamanashi, H. Hara, K. Taketomi, N. Yoshikawa, M. Tanaka, K. Obata, Y. Itou, A. Fujimaki, N. Takagi, and K. Takagi (Yokohama National Univ., Nagoya Univ.): "Design and Implementation of the SFQ Floating Point Units," Superconducting SFQ VLSI Workshop 2008 (SSV2008), A25, Yokohama National University, Yokohama, Japan, Mar. 17, 2008.
 H. Honda, H. Kataoka, F. Mehdipour, K. Inoue, and K. Murakami (Kyushu Univ.): "Development and Performance Evaluation of a Large Scale Reconfigurable Data Path Processor," Superconducting SFQ VLSI Workshop 2008 (SSV2008), A26, Yokohama National University, Yokohama, Japan, Mar. 17, 2008.
FY2006
Invited Talk
 高木直史、村上和彰、藤巻朗、吉川信行、井上弘士、本田宏明：「単一磁束量子回路による大規模再構成可能データパスをもつプロセッサ」、電子情報通信学会 超伝導エレクロトニクス研究会、SCE200636、超電導工学研究所（東京）、2007年1月26日．
 藤巻朗：「単一磁束量子エレクトロニクスの新展開」、電子情報通信学会 超伝導エレクトロニクス研究会、SCE200637、超電導工学研究所（東京）、2007年1月26日．
International Conference/Workshop
 H. Park, Y. Yamanashi, N. Yoshikawa, A. Fujimaki, M. Tanaka, H. Terai, S. Yorozu: "Design of BitSlice Adders Using RSFQ Logic Circuits," 2006 Applied Superconductivity Conference (ASC2006), 3EY03, Seattle, Washington, USA, September 2006.
